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Apple

FE Engineer

Austin, Texas, United States

Apple is hiring a FE Engineer in Austin, Texas, United States. Posted September 17, 2026.

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Job at a glance

Company
Apple
Location
Austin, Texas, United States
Sector
Engineering & Technology
Posted
September 17, 2026

About the job

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

APPLE INC has the following available in Austin, Texas. Integrate Internal and external IP (Intellectual Property), designing system bus and control bus logic for connectivity of IP blocks to the main SOC infrastructure. Own the Integration Spec for the design project. Integrate and optimize any memories and hard macros required for the block. Run synthesis, netlist generation, and timing closure for the block. Work closely with Chip Architecture, Design verification, Physical Design, DFT (Design for Test), and power teams to achieve first tape out success on designs. Develop and maintain methodology/flows/checks for owned designs. Work with multi-disciplinary groups to make sure designs are delivered on time and with highest quality by incorporating proper checks at every stage of the design process. 40 hours/week.

Minimum Qualifications

  • Master’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering, Computer Engineering, or related field.
  • Experience and/or education must include:
  • Using System Verilog or Verilog to write RTL for Integration components
  • Utilizing multiple clock domains, reset domains and applying techniques to fix the issues
  • Utilizing low power design concepts like clock gating, power gating and DVFS to meet low power design targets
  • Utilizing Synthesis tools from Synopsys or Cadence to use timing constraints to synthesize designs
  • Integrate RTL components into sub-systems interfacing with memories
  • Utilizing Design-for-test concepts to support scan insertion for overall testability
  • Utilizing CAD tools to ensure quality of design

Preferred Qualifications

  • N/A

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This position is not subject to the application limits.

EEO Statement

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

Accessibility

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Learn about accessibility in Apple’s workplace

Learn about reasonable accommodations for job applicants

Application Deadline

Apple accepts applications to this posting on an ongoing basis.