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Cadence Design Systems

Lead Analog IC Design Engineer

SAN JOSE 08, United States of America

Cadence Design Systems is hiring a Lead Analog IC Design Engineer in SAN JOSE 08, United States of America. Posted September 30, 2026.

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Job at a glance

Company
Cadence Design Systems
Location
SAN JOSE 08, United States of America
Pay
$119,000 – $221,000
Workplace
On-site
Employment
Full-time
Sector
Engineering & Technology
Posted
September 30, 2026

About the job

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

TBD

The annual salary range for California is $119,000 to $221,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.