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84 open ASIC Design Engineer jobs in the US from 43 companies, updated October 27, 2026. Free to search and apply on Yabot Jobs.
84 open jobs
43 companies hiring
2 / 17 / 35 remote / hybrid / on-site
$145,600–$256,000 median salary, of 67 listing one 1 found in the last 24 hours
48 verified in the last 24 hours
Newest jobs 51–84 of 84
Added Sep 19
A
Posted Sep 18
A
Posted Sep 18
C
Processor Core Logic Design/Architect
Cadence Design Systems AUSTIN 03, United States of America
Posted Sep 18
J
Posted Sep 17
Senior VLSI Library Methodology Engineer
Nvidia US, CA, Santa Clara, United States of America
Posted Sep 16
GPU Architecture Engineer - New College Grad 2026
Nvidia US, CA, Santa Clara, United States of America
Posted Sep 16
M
Principal SoC Design Engineer
Microsoft Mountain View, CA,US, US
Posted Sep 16
F
Senior Yocto Build Engineer
Ford Motor Company Palo Alto, CA, United States
Added Sep 16
Senior Design Engineer
Eastman Kingsport, TN, US
Posted Sep 15
C
Principal Digital Twin Engineer
Caterpillar Irving, Texas, United States of America
Posted Sep 15
M
Posted Sep 15
A
Silicon Prototyping Engineer
Apple Cupertino, California, United States
Posted Sep 15
Posted Sep 14
Posted Sep 14
P
Senior ASIC Design Verification Engineer
Palo Alto Networks, Inc. Office - USA - CA - Headquarters, United States of America
Posted Sep 14
ASIC Engineer- CAD
Cisco USA-SAN JOSE, United States of America
Posted Sep 13
O
Posted Sep 9
Sr. Staff Engineer, CPU (Front-End) Verification
Tenstorrent Austin, Texas, United States; Santa Clara, California, United States
Posted Sep 4
EDA/CAD Software Engineer
Qualcomm San Diego, California, United States of America
Posted Sep 1
Posted Aug 24
Principal DFT Engineer
SambaNova Austin, Texas, United States; San Jose, California, United States
Posted Aug 18
Product Application Engineer PCIe/CXL
Astera Labs San Jose, California, United States
Posted Aug 18
Design Engineer
WorkOS San Francisco, California, United States
Posted Aug 13
GSoC Design Verification Engineer
Qualcomm San Diego, California, United States of America
Posted Aug 10
CPU Microarchitect, Vector and Matrix Compute
Tenstorrent Santa Clara, California, United States; Spain
Posted Aug 10
Sr. Staff/Principal PCIE Subsystem Architect
Qualcomm Santa Clara, California, United States of America
Posted Aug 7
Principal Ethernet Scale-Out Architect, AI Data Center
Qualcomm Santa Clara, California, United States of America
Posted Aug 7
S
Posted Aug 5
Posted Jul 23
Formal Verification - DV
Etched San Jose, CA, United States
Posted Jun 10
Principal IP Signoff & Methodology Engineer
Astera Labs San Jose, California, United States
Posted Apr 29
Hardware Design Engineer, AI Inference Engine
ElastixAI INC. Seattle, Washington, United States
Posted Feb 19
Senior Design Engineer
MetaMask United States - Remote, EMEA - Remote
Posted Oct 28
How we count
Every number is counted from the open jobs on this page, updated several times each weekday. Found is when Yabot first saw a listing. Verified is the last time we saw it still listed on the employer's own job board; jobs added by hand are never verified. Posted is the employer's own date, shown only when they give one. Median salary uses yearly figures in US dollars from the listings that state one.