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L3HHCM20

Electronic Warfare and Communications Analysis Design Engineer

Salt Lake City, UT, US

L3HHCM20 is hiring an Electronic Warfare and Communications Analysis Design Engineer in Salt Lake City, UT, US. Posted September 30, 2026.

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Job at a glance

Company
L3HHCM20
Location
Salt Lake City, UT, US
Sector
Engineering & Technology
Posted
September 30, 2026

About the job

Job Title: Sr Specialist - EW and Communications Analysis Design Engineer

Job Code: 42397

Job Location: Salt Lake City, UT

Job Schedule: 9/80 Employees work 9 out of every 14 days- totaling 80 hours working- and have every other Friday of

L3Harris is seeking a Communications Analysis and/or an Electronic Warfare Engineer to provide technical knowledge and expertise in the area of communications systems and EW for DoD programs and joint research programs.

Qualifications:

  • BSEE and 6+ years experience, MSEE and 4+ years experience, or PhD and 2+ years required

  • DOD Secret Security Clearance

  • Architecture, FPGA, VHDL, MATLAB, or C++/C#  design experience is a plus

Areas of desired experience or education include:

  • Communication systems analysis

  • Communications systems architecture (focusing on the physical layer)

  • Electronic Warfare (EW) systems analysis

  • Electronic Support (ES) architecture

  • Electronic Attack Systems

  • Algorithm development, simulation, and documentation

  • Critical component evaluation and modeling

  • Requirements analysis and management

  • Proposal support

  • High-rate Communication Systems

  • Satellite Communication Systems

  • Spread Spectrum Systems

  • Software Defined Radios

  • Digital Signal Processing

  • LPD/AJ Systems

  • Non-linear signal processing for intermod or harmonic suppression

  • MIMO

  • Phased Array Processing

  • Forward Error Correction (FEC)

  • Experience in either VHDL (preferred) or Verilog development languages.

  • Experience implementing complex modem and/or DSP circuits in programmable logic using FPGA devices.  Equivalent experience in ASIC design is also applicable.

  • Experience in simulation, synthesis, and placement software tools such as ModelSim, Synplicity, Xilinx Vivado / ISE and/or Altera Quartus development tool sets.

  • Experience in laboratory debug techniques using digital scopes, logic analyzers, BERTS, and other complex measurement devices.

  • FPGA Design using High-speed serial interfaces (3+ Gbps)

  • Familiarity with code revision management tools such as Git/Clearcase.

  • Familiarity with C/C++/C# and Matlab/Simulink.

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